Understanding phase noise and jitter using a phase noise explorer toolFollow article
Phase noise is a big deal in circuit design involving clocks. So, it becomes very handy to have a tool that you can plot phase noise at important operating frequencies.
The Phase Noise Explorer software from On Semiconductors enables an interactive environment for advanced phase noise/jitter analysis of clock tree designs; including component phase jitter contribution, phase noise and spur plotting, and download of performance results.
Clock sources or clock buffers can be analysed and up to 3 filters can be applied. A combine function will place multiple plots onto a single plot, allowing up to 5 sources or buffers to be analysed at one time. A sum function is available; this will take the power sum of different plots and display them on a new plot. Up to 4 sources or buffers can be analysed together using this functionality.
The tool plus other useful information is readily available from the ON Semiconductor website with a simple registration process. Click here to access
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