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Ferrite Core Memory and a Flash Memory Card Picture Credit: Wikipedia
Magnetic Ferrite-Ring Core Memory
When I was a lad back in 1975, I worked as a student engineer testing military aircraft computer memory modules. Looking back now, they probably represented the ultimate development of Ferromagnetic ring core technology. Each module measured about 18 x 10 x 6cm, and contained nearly 600,000 ferrite ring cores providing 32K x 18bit words of Non-Volatile Random-Access Memory or NVRAM. Each core was about 0.033mm in diameter and three wires had to be fed through the hole in its centre. No machine had the precision to weave this metallic fabric, so people with very steady hands and incredible eyesight were employed to make it by hand! That and the full military specification accounted for the price tag of £25,000 each – in 1975 money. Core memory exploits the Hysteresis property of ferromagnetic materials whereby they remain magnetised after the magnetising force is removed. If the core is magnetised in one direction, this could represent a logic 1. Reverse the force and the core is flipped to the opposite polarity – a logic 0. Unfortunately, the method used to read the data destroys it, so a read cycle has to be followed by a write-back of the original state.
Early Semiconductor Memory
In 1975 there were semiconductor memory chips available: Intel 2102 1K x 1bit Static RAMs and the 1103 Dynamic RAM devices of the same capacity. They were being used in commercial computers, but were not considered reliable enough for the military environment. Being ‘volatile’, that is losing data when their power supply was switched off, didn’t help either.
Generally, computers need two sorts of memory: program memory (usually volatile) from which instruction code can be read as fast as the processor needs it, and slower, but higher capacity non-volatile storage containing program code to be loaded into the program memory.
Current Technology for General Purpose (Desktop/Laptop) Computers
PC designers have always used one form or another of Dynamic RAM for program memory. Once the technology had advanced to the point where a single cell or bit had been reduced to a single transistor plus a capacitor, nothing else could compete in terms of density and access speed. Over the years, a ‘scaling’ process took place whereby the physical size of the cell was reduced allowing more and more memory cells to be crammed onto a silicon die. The reducing size has led to increasing speed, but the need for constant ‘refreshing’ every few milliseconds means that DRAM has always been power-hungry. Refreshing is necessary because the charge on the capacitor, which represents the logic state, gradually leaks away. Static RAM which doesn’t need refreshing, uses less power and is faster, seems like a better choice. The trouble is, because it needs up to six transistors per cell it’s not possible to get anywhere near the same number of bits per chip as Dynamic RAM. Both Dynamic and Static RAM are volatile and need to work with non-volatile storage using magnetic tape, floppy disk or hard disk-based technologies. Non-volatile RAM devices have been under development since the 1980’s but until now they have been unable to keep up with the scaling of hard-disks and Dynamic RAM, both in capacity and speed.
Current Technology for Embedded Computing
Embedded processors really need non-volatile program memory because for most projects, there is no room for a hard disk or an optical drive. In most cases a pre-programmed Read-Only memory (ROM) would suffice. A characteristic of embedded processors is that they (usually) only run a single application, unlike a general-purpose machine such as a PC. The problem is that firmware development will often require many program-debug-edit-reprogram cycles and this is going to be very expensive if the memory chip is thrown away every time a bug is found.
The Developer’s Friend: Re-programmable ROM
In 1971 a Floating-Gate MOSFET memory cell formed the basis of the first EPROM, a programmable and erasable ROM chip, the 256 byte Intel 1702A. Unfortunately, it wasn’t electrically erasable, and it needed to be erased before new code could be programmed. It worked by storing charge on the floating gate which was surrounded by insulation to prevent the charge leaking away – rather like Dynamic RAM. The insulation is so good, data can be retained for many years without power to the chip.
The price paid for the non-volatility was the high voltage that had to be applied for a (relatively) long time to program a cell. It could be erased by exposing the chip to high-intensity UV light for about 10 minutes in a special light box: the chip package was fitted with a UV-transparent quartz ‘window’ for this purpose. You could then program it on a special-purpose programmer unit before placing it in a socket on your target board. These devices called, unsurprisingly, UV EPROMs dominated embedded designs for many years until the floating-gate MOSFET technology became electrically erasable, in what is now called Flash memory.
You don’t need an external EPROM programmer or UV Eraser to work with Flash memory. But write cycles are still slow because of the need to erase and re-program blocks rather than individual cells. Like the old UV EPROM, Flash gives the engineer fast random-access reads, but very slow block erase-writes. Another drawback is the limited number of write cycles an individual cell can take before it fails, often as low as a few thousand. The relatively high-voltage programming pulses eventually take their toll on the cell, damaging it permanently. For embedded application development, write durability is seldom a problem as long as there is sufficient capability left for occasional firmware updates once the product is delivered.
Magnetoresistive RAM (MRAM) – Magnetic Memory on a Chip
I started this article by describing one of the earliest digital computer memory technologies based on the magnetic polarity of ferrite rings. The physical size of computers started shrinking with the replacement of thermionic valves, initially with discrete transistors and then by ever denser semiconductor integrated circuits. These developments made for smaller processors but chip designers have always struggled to find a technology that could miniaturize non-volatile random-access memory to the same degree. You could have high-speed RAM that lost all data when the power went off, or non-volatile memory that could be read at high speed, but which involved complicated and slow write processes. Ironically perhaps, a technology first proposed over 30 years ago and inspired by those magnetic ferrite rings, is finally maturing – MRAM. Basically, an MRAM cell is a three-layer stack composed of two pieces of magnetic material separated by a ‘Tunnel Barrier’ layer. If the magnetic fields of the two ‘magnets’ are aligned then the electrical resistance of the tunnel barrier is low and a logic 0 is read. If the fields are opposed, then the resistance is high and a logic 1 is read. Unlike the old core memory, reading data is not destructive, eliminating the need for a write-back. The precise nature of the magnetic fields is the subject of continuing research, so as to achieve chip densities close to that of the latest DRAM devices. So how does MRAM shape-up against DRAM and Flash?
- Density. MRAM is fast catching up with DRAM in bits per chip. What’s holding things up are the relatively high read and write currents which can lead to adjacent cells suffering ‘disturbance’ as the cell size shrinks.
- Speed. MRAM is comparable in speed to DRAM, unlike Flash offering full read and write random-access. Research suggests it can go a whole lot faster.
- Power Consumption. MRAM devices are far less power hungry than DRAM simply because of their non-volatility. The frequent refresh cycles necessary to retain the data in a DRAM are not required. MRAM does not share Flash memory’s need for high-voltage pulses when writing data either.
- Data Retention. MRAM in principle retains data indefinitely, but high write currents are required which become problematic for the reason indicated under Density above. Charge stored on a Flash cell will eventually leak away, but not for many years and probably not during the useful life of the equipment into which it’s built.
- Lifetime. DRAM has an indefinite lifetime if operated correctly, unlike Flash which can only tolerate a limited number of write cycles. The life of Flash memory can be extended by ‘wear levelling’ which means ensuring that memory writes are evenly spread over all the cells on the chip. This avoids the situation on a USB memory stick for instance, where only half the available capacity is used, with half the cells being frequently overwritten and the other half never being used at all. This task is usually performed invisibly by an on-board processor which also imposes a file structure compatible with PC operating systems such as Windows and Linux. MRAM can have an indefinite life, but again the size of the read/write currents will affect this.
Ferroelectric RAM (FeRAM or FRAM)
FRAM operates much like the old magnetic core memory but with an electric instead of a magnetic field to flip the storage element from one state to the other. It’s called Ferroelectric, not because it contains iron, but because the switching of the cell state has the same hysteresis characteristic as the old Ferromagnetic core memory. Structurally, a FRAM cell has the same three-layer form as MRAM – a Ferroelectric crystal of Lead Zirconate Titanite (PZT) sandwiched between two electrodes. The logic state is stored as the position of an atom within a molecule of PZT. The basic structure may be similar to MRAM, but the operation is more like the old core memory: reading data is destructive requiring that cycle of write-back. FRAM’s random-access read/write capability makes it a very attractive replacement for Flash in embedded applications.
- Density: Current technology cannot compete with DRAM for bits/chip, but newer ferroelectric materials do promise greater capacity.
- Speed: FRAM is slower than the fastest DRAM, but devices with access times of a few nanoseconds are theoretically possible. However, the destructive read does add to the cycle time of the memory, increasing the interval between consecutive reads.
- Power Consumption: Like MRAM, FRAM is a low-power device because no refresh cycles are needed and writing non-volatile data does not require a high voltage.
- Lifetime: FRAM can tolerate considerably more write cycles than Flash, although it does eventually suffer from imprint and fatigue problems. For most purposes though, its lifetime can be considered indefinite.
One feature of both MRAM and FRAM which makes them very attractive in certain specialist areas is their resistance to ionising radiation, be it from radioactive elements used in medical instruments or cosmic particles in Space. The shrinking size of DRAM and SRAM cells is making them increasingly susceptible to ‘Single Event Upsets’ where a cosmic particle impact flips the state of memory bit, usually temporarily but sometimes permanently. The Flash and SRAM on many microcontroller chips targeted at high-reliability applications feature Error-Correction Coding to help mitigate this problem.
Neither of these technologies, and others (See below) is fully ‘mature’ yet, but progress is being made and there are products available on the market. Cypress Semiconductor have a large range of memory chips and Texas Instruments feature FRAM memory versions of their MSP430FRxxxx range of 16-bit microcontrollers.
Objective Analysis: New Memories for Efficient Computing This white paper provides much more detail on the architectures of current and future digital memory devices and their relative merits.
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