Optimise The Selection of Timing Components Using Phase Noise PlotsFollow article
Phase Noise Plots form a key tool in the selection process for timing components that are best suited to your applications.
There are two areas of application, Standard performance typically consumer electronics where domain jitter parameters are key. High performance applications where frequency domain parameters such as phase noise and phase jitter are used.
Phase noise plots allow modelling on a single spectrum showing the noise power density in one bandwidth with regard to the carrier signal. They are covered in more detail in the articles where Jitter transfer period and PLL bandwidth are also discussed.
The ever increasing demand for speed and rate of data transfer requires high speed data links. In order to meet these demands the serial communication standards such as PCI-Express, USB, Ethernet, SATA and Infiniband are being developed. The individual clock components must be capable of performing to specification in order to deliver reliable operation.
Phase Noise plot Modelling
Typical Configuration for Phase Noise Measurement
Popular ON Semiconductors Timing functions