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Some months ago I embarked upon a project to write a FORTH language interpreter/compiler from scratch to run on a Microchip PIC24 or dsPIC microcontroller. This questionable use of time was inspired by three things: the arrival of the FIGnition computer board, a desire to get back to assembler language programming and the rediscovery of a FORTH interpreter/compiler I wrote for the 8085 back in 1982.
The FFT Test
One of the milestones I set myself on this project was to get FORTHdsPIC to the point where it would run a Fast Fourier Transform demo I wrote for that 8085 FORTH of years ago. Well that has been achieved with Version 0.3 and minimal modifications were required to the original FFT code. Faced with the size of the source code file I really didn’t feel like typing it in every time and a built-in Flash programmer is still some way down the agenda. Fortunately the simple terminal emulator I’m using on an ancient Windows 3.1 laptop features a basic file transfer function. I set up Windows Terminal to send one line of text at a time to FORTHdsPIC which returns CTRL B when it’s ready for another. The advantage is that no special code had to be written for disk file input: as far as the FORTH interpreter and compiler are concerned it just looks like very fast typing! A text file editor such as Notepad or my favourite NoteTab is used to generate the source code file. After loading and compiling, executing the TEST word performs an FFT on a single non-windowed rectangular pulse and prints out a table of the real frequency components. Typing GRAPH prints a graphical representation of the power frequency components. It’s hardly accurate but proves the program works.
Code Improvement
As part of the assembler learning exercise I tidied some of the code bringing about some useful speed improvements. For instance, I ‘discovered’ that a fixed offset can be added with indirect addressing modes. This means for example, that an item can be read from some way down a stack without having to pop everything off above it. See how the FORTH word OVER is reduced from six instructions to three by reading rather than popping the second item off the stack:
; OVER = Copy second parameter stack item over top
OVER: mov [--w13],w0 ;Pop TOS
mov [--w13],w1 ;Pop TOS-1
mov w1,[w13++] ;Push new TOS -2
mov w0,[w13++] ;Push new TOS-1
mov w1,[w13++] ;Push new TOS
bra NEXT
New version using offset:
OVER: mov [w13-0x4],w0 ;Read TOS-1
mov w0,[w13++] ;Push new TOS
bra NEXT
The RAM allocation was also tidied up so the memory requirements for Vsn 0.3 are now 8 Kbytes Flash program memory and 8 Kbytes of RAM. The small RAM size limits the size of the user code but if you need space for monster programs there are dsPICs and PIC24s with 16 and 32 Kbytes of RAM. The FFT demo program fits in and that needs room for four 256-word arrays!
MicroStick II
The next item on the to-do list is to add some I/O port instructions so that real-time control of things like motors becomes possible. FORTH was used extensively for robot control after all. I thought I’d try one of the cheaper Microchip development tools for dsPIC/PIC24, moving down from the RS EDP and Explorer 16 to the MicroStick. Things don’t get much more minimal than this but I can’t see a problem and it works with DIP package chips: a great advantage at hobby or developer level. The heading picture for this blog post is of a simple table explorer robot based on nothing more than a dual comparator chip. Hmm, might just replace that with a dsPIC...
The return of +5volt power supplies..?
On a different topic I notice that some chip vendors, after years of extolling the power saving benefits of lower power supply voltages have started pushing 5 volts again. These 5 volt ‘tolerant’ chips have suddenly become ‘safety’ devices. Two topics I have blogged about and written articles on over the past year or so are Computer Reliability and Power Saving techniques. Functional Safety driven by international standards such as IEC61508 and ISO26262 is uppermost in the minds of many control system designers today, but so is energy efficiency. It’s been noticed that that reducing logic voltage levels also reduces noise immunity and hence increases the probability of error. So it could be back to good old 5 volt logic in systems where reliable operation is more important than minimal power consumption.
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