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Booting Linux on a DE0-Nano with ORPSoC


Programming the DE0-Nano with an open source 32-bit RISC processor and running Linux.

OpenRISC is a family of 32-bit and 64-bit open source processor designs that are implemented in Verilog.

ORPSoC is a complete reference system-on-chip (SoC) that is based around the OpenRISC 1200 32-bit processor core, and which also includes things such as SRAM, a debug interface and UART.

OpenRISC is typically targeted to FPGAs. However, it has also been implemented in ASICs, and has even found its way into Samsung digital televisions and an educational satellite.

ORCONF 2013 workshop

The OpenRISC project held their annual conference back in October and this featured a workshop at which participants got to build ORPSoC and program a DE0-Nano with it, and then were able to load “bare metal” applications and Linux. Due to other commitments I was unable to make it along to the conference, but fortunately the workshop has been documented on

How easy it to follow the workshop instructions and to get to the point of booting Linux? Well, extremely easy as we'll come to see.

Setting up the tools

Section 3 of the workshop documentation takes you through tool installation and since at this point I wasn't interested in compiling a bare metal OpenRISC application or a new Linux image, I omitted step 3.2, which covers installing the OpenRISC GNU toolchain.

Downloading and installing the Altera Quartus software took by far the longest, and setting up the ORPSoC build system and OpenOCD debug proxy took no time at all.

Building ORPSoC


Once the orpsoc-cores Git repository had been cloned, it was necessary to configure this with a second “git remote” (repository) which contains modifications to the stock ORPSoC. Once this had been done the workshop Verilog sources could then be checked out.

As per the instructions, a build directory was created next and along with this a configuration file. Following which the build system was invoked with simply orpsoc build de0_nano.


After a little time and quite a bit of output the process completed and a de0_nano.sof file was created.

Programming the FPGA and loading Linux

With the Quartus jtagd running as root and a DE0-Nano connected via USB, the quartus_pgm command line tool was used to program the FPGA.


Once this step had been completed, two LEDs on the DE0-Nano started blinking and it was then possible to attach the JTAG debug proxy, OpenOCD.


After OpenOCD had successfully established a connection to the ORPSoC debug unit, it was time to go to another terminal and to connect to the proxy via telnet.


OpenOCD could then be used to halt the processor, load the pre-compiled Linux image, and reset.


The screen command was then used to connect to a USB UART which was configured for 3.3v logic levels and plugged into J2 on the DE0-Nano.


Hitting resulted in the familiar hash prompt and Linux commands could be entered.

The provided Linux image also happens to include the embedded processor benchmark, CoreMark.



The beauty of the ORPSoC build system is that you don't have to use the Quartus IDE at all, and nested menus and mouse clicks have been replaced by scripts which use the command line tools.

Compiling ORPSoC, programming DE0-Nano and loading a Linux image was surprisingly straightforward. Of course, this was using a canned SoC project and a pre-prepared image.

The hard work may have been done for you but the workshop provides a gentle introduction to building ORPSoC and booting Linux. It has certainly whetted my appetite and next I'll have a go at setting up the OpenRISC GNU toolchain and compiling a custom Linux image, and perhaps I'll eventually progress to tinkering with ORPSoC configuration. One step at a time!

Andrew Back

Open source (hardware and software!) advocate, Treasurer and Director of the Free and Open Source Silicon Foundation, organiser of Wuthering Bytes technology festival and founder of the Open Source Hardware User Group.

12 Nov 2013, 18:38